1. Field of the Invention
The present invention relates to oscillator systems, and more specifically, to voltage-controlled oscillator of phase locked loop systems.
2. Description of the Related Art
Phase-locked loop circuits are known. Phase-locked loop circuits are used to provide a clock signal in conventional integrated circuit chips. Conventional phase-locked loop circuits include a conventional phase detector, a conventional amplifier, and a conventional voltage controlled oscillator. The conventional phase detector is coupled to the conventional amplifier. The conventional amplifier is coupled to the conventional oscillator.
The conventional phase detector compares two frequency signals to determine if they are equal. If they are equal, the voltage controlled oscillator locks in to a frequency of the input signal. If the two signals are not equal, the conventional phase detector generates a phase error signal that is amplified and sent to the voltage controlled oscillator. The voltage controlled oscillator uses this signal to deviate the frequency of its signal towards the frequency of the input signal.
As the speed of integrated circuit chips increases the conventional phase-locked loop circuit becomes more and more unreliable. For example, cycle-to-cycle jitter in the signal output from the voltage controlled oscillator increases. Most of this jitter results from sources within the phase-locked loop circuit. For example, in a deep sub-micron process, digital circuitry in the ultra large scale integration system makes the supply voltage particularly noisy.
Further, a problem with conventional phase-locked loop circuits is that they are unreliable in high frequency applications. Severe jitter is unacceptable in such applications. The jitter that results in a high performance system causes errors in the generated system clock and inaccuracies in clocked data. This results in a decrease in overall system speed and efficiency.
In conventional phase-locked loop circuits, there may be numerous sources of jitter. For example, one source of jitter is supply voltage noise from sources such as the conventional voltage controlled oscillator in the phase locked-loop circuit. Another source of jitter is the intrinsic noise in field effect transistors used in the phase-locked loop circuit. Still another source of noise is the noise coupling onto the controlled voltage from a phase detector or low-pass filter. Each source of jitter increases the overall jitter in the system.
Therefore, there is a need for a phase-locked loop system and a method that (1) is suitable for deep sub-micron process, (2) generates a clock signal with reduced supply voltage noise sensitivity in high frequency applications; and (3) includes a supply voltage noise immunity low jitter voltage controlled oscillator.